The present invention relates to a semiconductor memory device, and more particularly to effective technology to be utilized, for example, in a dynamic type RAM (random access memory) incorporating a substrate back bias voltage generator.
In a dynamic type RAM having a MOSFETs (metal oxide semiconductor field effect transistor) as the basic elements, a method is known that a suitable substrate back bias voltage is supplied to a semiconductor substrate so that parasitic capacity between the semiconductor substrate and each circuit element is controlled to stabilize the operation. Also a dynamic type RAM incorporating a substrate back bias voltage generator to form the substrate back bias voltage has been developed.
Regarding various dynamic type RAMs having such substrate back bias voltage generators, U.S. Pat. Nos. 4,775,959, 4,631,421 and 4,455,628 have been disclosed. Also control of operation of the substrate back bias voltage generator based on an output of a level detecting circuit to monitor the substrate voltage is described in the U.S. Pat. Nos. 4,775,959 and 4,631,421.